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江同學 報告/作業 分享經驗 10/15 10/8 OS作業

10/15 10/8 OS作業
名稱 10/8 OS作業
日期 10/15
課程名稱 作業系統
指導教師 劉艾華

1.{1}Caches are useful when two or more components need to exchange data, and the components perform transfers at differing speeds.
{2}  Caches solve the transfer problem by providing a buffer of 
intermediate speed between the components.
  {3} If the fast device finds the data it needs in the cache, it neednot wait for the slower device. The data in the cache must be kept consistent with the data in the components. If a component has a data value change, and the datum is also in the cache, the cache must also be updated. This is especially a 
problem on multiprocessor systems where more than one process may be accessing a datum. 
{4} A component may be eliminated by an equal‐sized cache, but only if: (a) the cache and the component have equivalent statesaving capacity (that is, if the component retains its data when electricity is removed, he cache must retain data as well), and (b) the cache is affordable, because aster storage tends to be more expensive. 





2.{1}An interrupt is a hardware‐generated change-offlow within the system. An interrupt handler is summoned to deal with the cause of the interrupt; control is then returned to the interrupted context and instruction. 
A trap is a softwaregenerated interrupt. 
An interrupt can be used to signal he completion of an I/O to obviate the need for device polling. 
A trap can be stued to call operating system routines or to catch arithmetic errors. 
{2}A trap is an exception in a user process. It's caused by division by zero or invalid memory access. It's also the usual way to invoke a kernel routine (a system call) because those run with a higher priority than user code.
Handling is synchronous (so the user code is suspended and continues afterwards). In a sense they are "active" - most of the time, the code expects the trap to happen and relies on this fact.

An interrupt is something generated by the hardware (devices like the hard disk, graphics card, I/O ports, etc). These are asynchronous (i.e. they don't happen at predictable places in the user code) or "passive" since the interrupt handler has to wait for them to happen eventually.
{3}Yes. User programs create traps for debugging purposes. A trap can be used to call the OS routines or to catch arithmetic errors.






3. A device controller is a part of a computer system that makes sense of the signals going to, and coming from the CPU.
The CPU sends signals to control the other parts of the computer, is an electronic machine that works on a list of things to do.





4. Pause the current execution and then save the status of the execution. OS searches Interrupt vector by Interrupt ID. For example,when a hardware or software makes a interrupt , the cpu will stops working and start executing the

interrupt routine , when finishing the routine , the cpu will restores CPU state

更新日期:2015/11/12 下午 10:27:08